Intel six-core chip with more L2 cache spotted in SiSoft database

Posted on Monday, December 16 2019 @ 13:16 CET by Thomas De Maesschalck
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Last month there was a Tiger Lake-Y GeekBench benchmark result leak that showed this part has a lot more L2 cache than its predecessors. Now Tom's Hardware discovered a new entry in the SiSoft database that reveals a chip with a similar cache structure. The chip was used in a dual-CPU server or workstation configuration, each processor featured six-cores and twelve threads.

The interesting thing here is that this part has 1.25MB L2 cache per core, significantly more than the 256KB found on the Coffee Lake series, and the 512KB for Ice Lake. It's not certain which processor this is. It could be the 10nm Tiger Lake or perhaps the 14nm Rocket Lake, which is believed to feature Willow Cove technology backported from 10nm. So far there's been no evidence of Tiger Lake chips with more than four cores so this could be a first sighting of Rocket Lake.
The amount of L2 cache per core is important to note because it has a big architectural impact on performance. This difference might be between two totally different architectures (AMD's Bulldozer vs. Zen), or between two architectures that share the same core but almost nothing else (Intel's Skylake vs. Skylake X). This Intel CPU likely isn't using a Skylake core, however, considering that Intel already has an architecture in this segment that is based on Skylake: Coffee Lake, soon to be succeeded by Comet Lake. This CPU is very likely to be using one of Intel's new architectures that it designed for the 10nm node. But which architecture is used?


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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